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Python bindings example:

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ad9528

Device Attributes

Name	Default value
pll1_feedback_clk_present
pll1_locked
pll1_reference_clk_a_present
pll1_reference_clk_ab_missing
pll1_reference_clk_b_present
pll2_feedback_clk_present
pll2_locked
sync_dividers
vcxo_clk_present

Channel Attributes

ADC_CLK

Name	sysfs filename	Examples
frequency	out_altvoltage13_ADC_CLK_frequency	EX
phase	out_altvoltage13_ADC_CLK_phase	EX
raw	out_altvoltage13_ADC_CLK_raw	EX

---

DAC_CLK

Name	sysfs filename	Examples
frequency	out_altvoltage2_DAC_CLK_frequency	EX
phase	out_altvoltage2_DAC_CLK_phase	EX
raw	out_altvoltage2_DAC_CLK_raw	EX

---

DAC_CLK_FMC

Name	sysfs filename	Examples
frequency	out_altvoltage4_DAC_CLK_FMC_frequency	EX
phase	out_altvoltage4_DAC_CLK_FMC_phase	EX
raw	out_altvoltage4_DAC_CLK_FMC_raw	EX

---

DAC_SYSREF

Name	sysfs filename	Examples
frequency	out_altvoltage5_DAC_SYSREF_frequency	EX
phase	out_altvoltage5_DAC_SYSREF_phase	EX
raw	out_altvoltage5_DAC_SYSREF_raw	EX

---

CLKD_DAC_SYSREF

Name	sysfs filename	Examples
frequency	out_altvoltage6_CLKD_DAC_SYSREF_frequency	EX
phase	out_altvoltage6_CLKD_DAC_SYSREF_phase	EX
raw	out_altvoltage6_CLKD_DAC_SYSREF_raw	EX

---

CLKD_ADC_SYSREF

Name	sysfs filename	Examples
frequency	out_altvoltage7_CLKD_ADC_SYSREF_frequency	EX
phase	out_altvoltage7_CLKD_ADC_SYSREF_phase	EX
raw	out_altvoltage7_CLKD_ADC_SYSREF_raw	EX

---

ADC_SYSREF

Name	sysfs filename	Examples
frequency	out_altvoltage8_ADC_SYSREF_frequency	EX
phase	out_altvoltage8_ADC_SYSREF_phase	EX
raw	out_altvoltage8_ADC_SYSREF_raw	EX

---

ADC_CLK_FMC

Name	sysfs filename	Examples
frequency	out_altvoltage9_ADC_CLK_FMC_frequency	EX
phase	out_altvoltage9_ADC_CLK_FMC_phase	EX
raw	out_altvoltage9_ADC_CLK_FMC_raw	EX

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